**++About INL and the Electronic research team:++**

The Lyon Institute of Nanotechnology (INL) is a Joint Research Unit (UMR 5270) under the supervision of CNRS, École Centrale de Lyon, INSA Lyon, Université Lyon 1, and CPE Lyon. INL's mission is to conduct multidisciplinary technological research in nanotechnologies and their applications, spanning from materials to systems. The laboratory relies on the NanoLyon technological platform and covers key economic sectors such as semiconductor industry, information technologies, life and health technologies, energy, and environment.

INL is a multi-site laboratory, with locations on the Ecully and Lyon-Tech La Doua campuses, and gathers \~200 people, including 121 permanent members. It is a major player in the Lyon Research and Higher Education Cluster (PRES).

The Electronics team's main objective is to develop technologies, devices, and systems for specific applications. New technologies are explored using top-down and bottom-up approaches to demonstrate advanced nanoelectronic devices and circuits. The team also develops new design methodologies and tools as part of its activities. Through collaboration between the device and design teams in the Electronics Department and other INL groups (Materials, Photonics, Biotechnology), research efforts are focused on heterogeneous circuits for biotechnologies and electronic systems for healthcare.

**++Scientific Context++**

Energy efficiency in computing systems is one of the major challenges facing the microelectronics industry today, from IoT devices to supercomputers. Conventional computing architectures based on CMOS technology are now facing fundamental limitations: the end of technological scaling, increasing static power consumption, and the "memory wall" --- the latter accounting for 70 to 90% of the total energy consumed by a computing system.

To address these challenges, In-Memory Computing (IMC) is emerging as a promising paradigm by integrating computation directly within memory arrays, drastically reducing data transfers. In this context, ferroelectric field-effect transistors (FeFETs) are strong candidates: compatible with standard CMOS processes, non-volatile, and low-power, they enable the design of reconfigurable logic gates where one operand is permanently stored in the ferroelectric gate --- an approach already demonstrated at INL.

The ANR eCAT project (Enabling Computer Architecture for Tomorrow, 2025 Franco-German PRCI) brings together INL, Inria Rennes, Heidelberg University, and TU Dresden. Its goal is to build a complete ecosystem for exploring heterogeneous architectures combining RISC-V processors, FeFET-based IMC units, Near-Memory Computing (NMC), and Approximate Computing (AxC). INL leads the tasks dedicated to the characterization and design of FeFET circuits, from device to system level.

This PhD thesis explores an original approach: leveraging ternary logic, made possible by the capability of ferroelectric devices to exhibit stable intermediate polarization states. This opens the door to higher integration density and logical expressiveness compared to conventional binary logic.

**++Thesis Objectives++**

The primary goal of this PhD is to design, model, and characterize ternary logic circuits based on ferroelectric devices (FeFET/FeCap), with a view to their integration into In-Memory Computing (IMC) units within the eCAT project's target heterogeneous architecture.

Using compact ferroelectric capacitor models available at INL, the PhD candidate will:

• Investigate programming conditions to achieve stable intermediate polarization states.

• Design a library of elementary ternary logic gates (ternary inverter, MIN/MAX gates, comparators, etc.), characterized in terms of delay, energy, and endurance, using industrial EDA tools available at INL (e.g., Cadence Virtuoso/Spectre, Synopsys).

In a second phase:

• Ternary arithmetic operators (adders, multipliers) will be designed and evaluated for eCAT target applications, particularly convolutional neural networks.

• Special attention will be given to introducing approximate computing through modulation of the ferroelectric programming scheme.

• The resulting models will be abstracted at different levels and integrated into the project's system simulator to assess real-world gains in energy, precision, and performance.